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The main hardware announcement during Huawei Connect 2026 was the Atlas 960E SuperPoD, which Huawei described as the industry’s first NPO-based SuperPoD
In sum – what to know
Ascend roadmap accelerates – Ascend 960DT is now planned for Q1 2027 and 960PR for Q3, followed by Ascend 970 in 2028 and 980 in 2029.
AI systems scale – New Atlas 960E and upgraded TaiShan 950 SuperPoDs, combined with OceanStor M900, form the basis of systems targeting up to one million NPUs.
Chip self-sufficiency – Huawei is expanding its domestic AI computing stack while Eric Xu said the company is pursuing greater self-sufficiency across semiconductors and their supply chain.
Huawei used its Huawei Connect 2026 event in Shanghai to outline an expanded AI infrastructure strategy centered on scaling computing systems, accelerating its Ascend chip roadmap, and expanding its software ecosystem.
In a keynote speech, David Wang, Huawei’s deputy chairman of the Board and rotating chairman, said the growth of foundation models, AI agents, and on-device AI is increasing requirements for computing infrastructure.
Wang said foundation model parameters are rapidly approaching 10 trillion and are projected to exceed 100 trillion by 2030. He also cited a sharp increase in inference-token consumption in China and growth in smartphone on-device models, which have risen from three billion parameters in 2024 to 30 billion today, according to Huawei.
Huawei’s response is centered on SuperPoDs and SuperClusters, with the Ascend chip family at the core of an 11-chip portfolio based on its UnifiedBus architecture.
The company said development of Ascend 960 has exceeded expectations, with performance doubling as planned. Ascend 960DT will be available in Q1 2027, while Ascend 960PR is planned for Q3 2027. The two launches have been brought forward from the company’s previous roadmap, according to press reports.
Wang also outlined Huawei’s longer-term chip schedule. “We’re evolving our Ascend chip series on a one-generation-a-year cycle,” said Wang in his keynote. “In 2028 and 2029, we will roll out the Ascend 970 and 980 chips, respectively. Thanks to the Tau (τ) Scaling Law, not only will their compute specifications continue to double, but you can also expect to see huge improvements across the board in terms of memory bandwidth, memory capacity, interconnect bandwidth, and more.”
The main hardware announcement was the Atlas 960E SuperPoD, which Huawei described as the industry’s first NPO-based SuperPoD. Using Ascend 960 chips and Huawei’s Hi-ONE optical interconnect technology, a single system can scale to 4,096 NPUs, with 8 EFLOPS of FP8 compute performance and up to 1 petabyte of HBM capacity.
Huawei said the system uses 5,500 Hi-ONE units instead of the 48,000 800G optical modules it says would traditionally be required to connect all the NPUs. The company said this reduces power consumption by more than 550 kilowatts and doubles fault-free operating time, with 99.8% system availability.
Hi-ONE provides 7.2 Tbit/s transmission capacity per engine and includes a built-in light source, according to Huawei. The company has also submitted an implementation agreement on NPO to the Optical Internetworking Forum.
Huawei also upgraded its TaiShan 950 SuperPoD for larger-scale AI workloads. The system supports up to 4,096 nodes and a unified memory pool of up to 256 TB. Huawei said it can start 100,000 sandboxes 30 times faster than traditional servers and increase sandbox density by 25%.
For inference workloads, Huawei introduced the OceanStor M900, a UnifiedBus-powered context memory storage cluster designed for multi-tier KV caching. It provides a petabyte-scale KV cache for the L3.5 layer and uses hybrid media and a retention algorithm that Huawei said extends SSD read/write lifespan by 16-fold.
These components feed into a new agentic SuperCluster aimed at training and inference for 10-trillion-parameter models. The architecture connects Ascend SuperPoDs, Kunpeng SuperPoDs and KV cache clusters through UnifiedBus. Huawei said it can interconnect up to 512,000 NPUs using a two-tier, four-plane Clos architecture and reach one million NPUs with a multi-rail topology.
Semiconductor self-sufficiency
Separately, Eric Xu, deputy chairman and rotating chairman at Huawei, told the Financial Times that Huawei remains behind leading U.S. semiconductor companies but said U.S. export restrictions have encouraged Chinese customers to adopt domestic technology.
Xu said Huawei is “pushing for full self-sufficiency for chips and the entire supply chain around semiconductors,” according to the report.
