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Qualcomm’s Dragonfly chips and HBC memory take aim at Nvidia’s inference lead

In sum – what we know:

• A data center pivot – Qualcomm is targeting more than $15 billion in annual data center revenue by 2029, expanding beyond smartphone SoCs into large-scale AI inference.
• A memory-centric bet – Its High Bandwidth Compute tech 3D-stacks compute and DRAM together to attack the memory wall, pitched as a lower-power, lower-cost alternative to Nvidia’s HBM approach.
• Meta and Microsoft anchor it – Two of the biggest AI infrastructure buyers have signed on, lending instant credibility, though early success is heavily concentrated in just those two names.

Qualcomm has been expanding. At its 2026 Investor Day in New York, Qualcomm laid out a full-scale push into AI data centers built around a new Dragonfly portfolio and a memory technology it calls High Bandwidth Compute. Essentially, this is Qualcomm’s entry into what management keeps calling the “agentic AI era,” aimed at large-scale inference in hyperscale data centers rather than the edge devices that have defined the company for a decade.

The numbers attached to that ambition are large. Qualcomm set a target of more than $15 billion in annual data center revenue by fiscal 2029, with “billions of dollars” arriving as early as fiscal 2027. Data center infrastructure now sits alongside automotive as a core growth pillar, part of a multi-year pivot beyond smartphone SoCs and radio chips. The company also pointed to an aspiration of more than $18 in adjusted EPS by 2029, with AI inference doing a lot of the heavy lifting. 

Nvidia and AMD, of course, already own much of the hyperscaler AI infrastructure capex boom, and they own it with GPU architectures that have years of momentum behind them. Qualcomm is betting that power efficiency and a memory-centric design can carve out a lucrative slice of inference workloads that GPU incumbents serve less efficiently. 

Dragonfly C1000 data center CPU architecture

The C1000 is Qualcomm’s first rack-scale data center CPU, and the company is positioning it specifically for agentic AI — the kind of workload where an AI agent reasons continuously over long contexts, calls tools, and keeps the conversation going. 

On paper, the design is aggressive. It’s chiplet-based, with more than 250 custom Oryon CPU cores targeting clock speeds above 5 GHz. I/O is built around PCIe Gen 7 and CXL, with aggregate bandwidth reported at more than 2 TB/s per socket. Sampling for early racks is slated for around fiscal 2026, with broad commercial availability targeted for mid-2028. Meta has been announced as a first-deployment customer once the CPU formally launches.

The interesting claim here is that the C1000 delivers more than 2x performance-per-watt versus competing high-core-count server processors, drawing on the same mobile-derived Oryon efficiency that powers its Snapdragon parts. That’s a direct shot at Intel Xeon and AMD EPYC, both of which are deeply entrenched in hyperscaler racks and neither of which is standing still. The thesis is that mobile efficiency scales up better than x86 scales down — something that is already playing out in laptop and desktop computer chips.

High bandwidth compute and AI accelerators

The more novel part of the roadmap is High Bandwidth Compute. The core idea is to attack the memory wall directly. Rather than packaging traditional High Bandwidth Memory around a large processor, HBC 3D-stacks compute and DRAM together, bringing the compute closer to where the data lives. Qualcomm’s argument, which it repeated often, is that memory bandwidth — not raw FLOPs — is the real constraint in generative and agentic inference. Stack the two together and you cut the power spent shuttling data on and off package, reduce latency for token generation, and lower system cost compared to expensive, supply-constrained HBM.

The accelerator roadmap runs on an annual cadence, with the LPDDR5X-based AI200 serving as the baseline for every comparison. The AI250 brings Gen 1 HBC, targeting roughly 133 TB/s of bandwidth per card, which Qualcomm frames as about 18x the AI200. It’s slated to begin sampling in mid-2027. The flagship AI300 follows with Gen 2 HBC and a projected 54x bandwidth increase over the AI200, arriving around 2028 alongside the C1000 to enable full Dragonfly racks. None of this is a single chip in isolation. The rack-level story includes high-speed PAM4 electrical connectivity for intra-rack links, optical scale-out for connecting racks across a data center, and support for UALink, the emerging open accelerator interconnect standard.

Against Nvidia’s HBM-centric approach, HBC is pitched as the lower-power, lower-TCO alternative, aiming for better bandwidth-per-dollar rather than peak compute. For specific bandwidth-bound workloads, Qualcomm claims the AI300 delivers 4–8x better performance-per-watt than contemporary GPU-centric solutions that prioritize TFLOPs. That’s a striking number, and it’s also the one I’d be most cautious about. It’s self-reported, measured on memory bandwidth per watt per card, and almost certainly tied to workloads that play to HBC’s strengths. The claim could be entirely fair for the cases Qualcomm has in mind. It’s just not something anyone outside Qualcomm has validated yet.

Major customers

What separates this from a hardware company waving slides at investors is the customer list. Meta has signed a multi-year, multi-generation strategic collaboration covering the standard Dragonfly portfolio, and is expected to deploy C1000-based racks once they reach commercial availability in 2028. Meta is one of the largest AI infrastructure buyers on the planet, so the deal hands Qualcomm immediate credibility against incumbents who’ve spent years earning it.

Microsoft Azure is the other anchor. Microsoft has committed to deploying Qualcomm’s HBC-based accelerator chips in its large-scale cloud data centers, which Qualcomm presents as validation of the HBC bet specifically rather than just the broader portfolio. For Microsoft, the logic tracks with a wider effort to diversify away from single-vendor GPU dependence. Beyond the two named giants, Qualcomm disclosed multi-billion-dollar custom data center chip orders from two unnamed hyperscale players, with initial shipments expected late in 2026. Those custom chips are separate products, but they share underlying IP, Oryon cores, and AI engines with the centralized Dragonfly roadmap.

By offering both custom silicon and standard off-the-shelf Dragonfly parts, Qualcomm gives hyperscalers an external alternative to their own in-house programs — the AWS Trainium and Google TPU efforts of the world. It’s a double-edged sword, though. Qualcomm ends up both enabling hyperscaler custom designs and competing against them, and the same buyers who multi-source today are perfectly capable of leaning harder on their own chips tomorrow. Early success is heavily concentrated in Meta and Microsoft, and concentration cuts both ways.

An uphill battle?

Delivering a full multi-chip, multi-rack hardware platform by 2028 carries enormous execution risk, and the timeline leaves almost no margin for the kind of technical delays that routinely hit first-generation data center silicon. Miss those dates and the 2029 revenue target starts to look shaky.

Then there’s the software, which is where I’d focus the most scrutiny. The Investor Day presentations were almost entirely about physical hardware. Qualcomm will need PyTorch and TensorFlow support, mature compilers, and inference runtimes that make Dragonfly a first-class target rather than a science project, plus a smooth migration path off existing GPU environments. Hardware roadmaps are the easy part of that story to tell on stage, which is precisely why the silence on software stood out.

The performance claims deserve the same skepticism. The 2x CPU figure and the 4–8x GPU performance-per-watt figure are self-reported, forward-looking, and likely built on carefully chosen memory-bound workloads. They may hold up. We just won’t know until independent benchmarks exist, and those are years away. There’s also a structural risk to the whole HBC thesis. Much of its appeal rests on HBM being expensive and supply-constrained. If HBM supply eases and prices fall the economic advantage of HBC shrinks, and Qualcomm’s core differentiator gets less compelling.