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SK Hynix’s expansion targets HBM and advanced-node DRAM for AI
In sum – what we know:
- Doubling memory capacity – SK Hynix plans to double memory wafer production within five years, weighted toward HBM and advanced-node DRAM rather than commodity chips.
- The telecom angle – The company is positioning the new capacity to secure long-term HBM supply for telco AI workloads like cloud-native 5G/6G cores and Open RAN.
- A massive capex wave – 2026 spending will top 2025’s 30.2 trillion won, anchored by the ~$12.9 billion P&T7 facility in Cheongju, slated to be the world’s largest HBM packaging and test site.
SK Hynix is set to dramatically increase its memory capacity. At Computex 2026, SK Group chairman Chey Tae-won, who also chairs SK hynix, told reporters that the company plans to double its memory wafer production capacity within five years. Chey described the move as a response to a structural shortage of AI memory chips he expects to persist until roughly 2030, and he made clear this isn’t a hedge against a passing demand spike.
Despite the broad “memory wafer capacity” claim, this obviously isn’t about commodity DRAM. The scaling is weighted heavily toward high-bandwidth memory and advanced-node DRAM, the AI-centric parts of SK hynix’s portfolio rather than the generic stuff that fills out a budget laptop. That matters, because HBM is where SK hynix currently leads. As of Q1 2026, Counterpoint Research data cited in coverage puts the company’s share of the global HBM market at about 58%, with Samsung and Micron trailing at roughly 21% each. SK hynix supplies memory for AI accelerators from Nvidia and AMD, and for the custom silicon that hyperscalers increasingly design in-house. Doubling capacity, then, is largely an effort to defend and extend that lead while demand still vastly outstrips supply.
Securing supply for telecom infrastructure and edge AI
The telecom angle is the one that’s easy to overlook, and it’s arguably where the expansion has the most immediate practical weight. SK Hynix is positioning this capacity to secure long-term HBM supply for telco AI workloads specifically.
That’s important because the next wave of telecom infrastructure leans heavily on AI hardware paired with advanced memory. Cloud-native 5G and 6G cores, Open RAN and vRAN baseband processing running on COTS servers with AI accelerators, and real-time network traffic analytics all need HBM in volume. Operators are increasingly running GPU clusters for network telemetry, anomaly detection, and traffic prediction to optimize networks and trim OpEx, and edge AI inference at distributed telco and enterprise sites adds more demand on top of that. None of these workloads tolerate the kind of supply uncertainty that defined the last crunch.
For telcos and the vendors building their kit, a clear multi-year capacity roadmap is worth more than the raw numbers suggest. It improves supply chain predictability, which lets operators time server refreshes and data center expansions with more confidence. It should also help blunt the severity of supply-driven price spikes. In other words, HBM is now being treated as a strategic infrastructure asset rather than a low-margin commodity component, and SK Hynix’s plan is essentially an attempt to make that asset reliable enough to plan around.
Capex scale, P&T7 facility, and the HBM roadmap
The spending behind all this is substantial. Chey said 2026 capex will exceed the 30.2 trillion won SK Hynix spent in 2025. He also said the company will do “whatever it requires” to fund the wafer capacity expansion, and to back that up the firm is reaching for sizeable financial tools, including a filing for an American Depositary Receipts listing in New York.
The marquee piece of the broader build-out is P&T7. SK Hynix recently approved roughly about $12.9 billion for the facility in Cheongju, which is slated to be the world’s largest dedicated HBM packaging and test site, sitting on a plot of around 231,000 square meters at the Cheongju Technopolis Industrial Complex. Construction begins in April 2026 and finishes by the end of 2027, with equipment installation following and volume operations expected toward the end of the decade, in time for HBM4E, HBM5, and HBM5E. P&T7 is designed to work closely with the nearby Fab M15X, forming a tightly coupled ecosystem for producing large HBM dies, which run three to four times the size of commodity DDR5 dies, and packaging them into stacks.
The capacity push tracks with where the architecture is heading. HBM3E boosts core density to 24Gbit dies, up from 16Gbit, for at least 1.5x the capacity of the prior generation, while pushing per-pin data rates from around 6.4 Gbps to roughly 9.2 Gbps. The upcoming HBM4 generation plans to double I/O count to 2048 and introduce logic process technology in the base die to improve performance and power management. SK Hynix has also signaled plans to ramp 1c-class DRAM capacity by up to 800%, aimed at AI inference and high-performance applications. The five-year doubling, then, should be read as part of a broader capex wave spanning both front-end wafer fabs for advanced DRAM and HBM and back-end packaging and test for complex TSV-based stacks.
Not an overnight change
For all the scale here, none of this lands quickly, and Chey said as much. A new greenfield fab typically takes more than five years to come online, which means a meaningful chunk of this new supply might only arrive near the tail end of the shortage window he’s predicting. That’s a double-edged sword. If it shows up late, it helps less than hoped during the tight years. If demand softens or normalizes faster than expected, the additions could overshoot total market needs and pressure pricing and margins.
Cost forecasting is its own source of uncertainty. Chey acknowledged he can’t put a precise figure on the total investment because land, equipment, and electricity prices are volatile, and those inputs materially affect project economics. There’s technology risk too. HBM generations are moving fast, from HBM3E to HBM4 to HBM4E and HBM5, so new fabs and packaging lines have to align with future nodes and standards rather than just today’s parts.
The competitive picture stays crowded regardless. Samsung is ramping both HBM and conventional DRAM and pursuing advanced packaging to close the leadership gap, and Micron is investing heavily in HBM3E and advanced DRAM nodes, even if its HBM share still trails the other two. It’s a genuine capacity race among the big three, and missteps in technology or geopolitics could shift share away from SK hynix despite its current lead. Most commentators still expect AI demand to outpace all of that ramping through the late 2020s, keeping the market tight. And there’s a question worth flagging that the headline numbers don’t answer. Lifting 1c-class DRAM capacity by something like 800% carries a real environmental and energy footprint, which puts pressure on SK Hynix’s efficiency and renewable roadmaps.
