Synopsys brings agentic AI workflows to chip design and verification

Home Semiconductor News Synopsys brings agentic AI workflows to chip design and verification
Synopsys

Synopsys claims 25-40% faster debug, with AMD evaluating on Microsoft Discovery

In sum – what we know:

  • Two new workflows – Synopsys is shipping agentic AI for debug closure and for implementation and closure, the first EDA applications on Microsoft Discovery.
  • Vendor-claimed gains – Early evaluations point to a 25-40% cut in debug cycle time, though the numbers are Synopsys’ own and not independently verified.
  • Evaluation, not production – AMD is testing the workflows on AI infrastructure silicon, and pricing, licensing, and general availability remain undisclosed.

Synopsys is bringing two new autonomous “agentic AI” workflows to chip design and verification, timed to coincide with the company’s presence at the 2026 Design Automation Conference (DAC) “Chips to Systems” event. The workflows are being delivered as the first EDA applications on Microsoft’s Discovery platform, with AMD serving as a key early evaluation partner.

The “agentic” label gets thrown around loosely these days, so it’s worth pinning down what Synopsys actually means by it. In this context, agentic AI refers to orchestrated teams of AI agents — some with deep domain-specific EDA knowledge and direct tool connections, others handling task-level planning and coordination — working together under the company’s AgentEngineer framework. The pitch isn’t full replacement of engineers — at least not yet. Synopsys stresses that the agents take over repetitive, execution-heavy work while human-in-the-loop checkpoints remain in place for architecture decisions, trade-offs, and risk. Whether or not that’s the long-term goal remains to be seen.

Synopsys frames this as a first-of-kind industry capability, offering full multi-agent autonomy across critical stages of the chip design process. That’s a claim worth watching, but the specifics of the announcement are concrete enough to take seriously.

Debug and implementation workflows

The first workflow targets debug closure, historically one of the most time-consuming phases of chip development. Agents orchestrated through Microsoft Discovery examine verification results, identify design failures, classify issues, and automate root cause analysis (RCA) — the painstaking work of figuring out why something broke. Synopsys claims early evaluations show a 25–40% reduction in debug cycle time versus traditional manual workflows, which the company says translates into weeks of saved engineering effort. Those are vendor numbers from early evaluations, not independently validated production data, but even the low end of that range would be meaningful for teams staring down complex verification schedules.

The second workflow handles implementation and closure. Here, Synopsys implementation agents work with the company’s Fusion Compiler running on Azure, adjusting implementation recipes and exploring design options to push a design toward closure. The claimed payoff is improved Quality of Results (QoR) across power, performance, area, and manufacturability with minimal human intervention — though the announcement stops short of detailed benchmark figures beyond “better outcomes.”

Microsoft discovery platform and ecosystem orchestration

The new workflows are flagship engineering use cases for Microsoft Discovery, the enterprise platform for scientific and engineering agentic AI that Microsoft made generally available on June 2, 2026. Discovery serves as the orchestration layer in this arrangement, coordinating the various agents and connecting them to Azure-based compute and Synopsys tools for cloud-scale execution of long-running design tasks.

This isn’t a partnership that materialized overnight. Synopsys and Microsoft introduced Synopsys.ai Copilot in late 2023, a generative AI capability powered by Azure OpenAI that Microsoft’s own silicon teams used to automate formal verification artifacts — SystemVerilog Assertions, auxiliary logic, TCL scripts, and other collateral that typically demands specialized expertise. The two companies followed that with a multi-agent prototype for chip design shown at DAC 2025, which served as the proof of concept for what’s now shipping for evaluation.

Microsoft isn’t the only hardware-and-cloud partner in the picture, either. At DAC 2026, Synopsys also unveiled parallel agentic capabilities running on Nvidia’s Nemotron, secured by Nvidia’s OpenShell runtime. Synopsys is hedging its infrastructure bets — the AgentEngineer framework sits at the center, with Azure and Nvidia’s stack as parallel deployment tracks. That’s probably the right call given how contested AI infrastructure has become.

AMD evaluation and historical AI gains

AMD’s role deserves careful framing. The company is actively evaluating the Discovery-based workflows on real-world challenges tied to advanced AI infrastructure silicon — not deploying them broadly across production design programs. That distinction matters. AMD’s messaging emphasizes that root cause analysis backed by deep EDA domain knowledge can accelerate deployment scaling while improving design velocity and silicon quality, framing the shift as a new engineering paradigm. But evaluation is not tapeout.

That said, the two companies have a track record here. In January 2026, the World Economic Forum recognized Synopsys and AMD for their generative and agentic AI work in semiconductor design, citing it as an example of real-world AI adoption. And the historical numbers from their collaboration are notable, at least as reported by the companies themselves — roughly doubled productivity across design and verification, about 25% wider design exploration, a 5x reduction in design costs, and a 50% cut in time to signoff. The July announcement positions the new workflows as the next step in that trajectory, extending gains from reinforcement learning and generative AI into genuinely autonomous multi-agent territory.

Lots of open questions

For all the specifics, plenty remains undisclosed. Synopsys and Microsoft haven’t shared pricing, licensing structures, or a timeline for general commercial availability — customers can request evaluation access, and that’s about it. How these workflows get packaged, whether as cloud subscriptions or add-ons to existing tool licenses, will shape adoption as much as the technology itself.

The evaluation-stage status also invites fair scrutiny. The industry has seen no shortage of “agentic AI” marketing over the past couple of years, and until AMD or another customer announces production tapeouts using these workflows, the headline metrics remain early-stage vendor claims. Reliability is the related unknown. Speed and productivity gains are one thing; how these agents handle edge cases, rare bugs, and safety-critical designs — the scenarios where a missed failure costs a respin — is unproven, and there’s limited public information on how the workflows integrate with existing signoff practices for high-stakes silicon.

Running EDA in the cloud raises its own concerns. Chip designs are among the most closely guarded IP in the industry, and moving them onto Azure and Discovery means trusting Microsoft’s enterprise governance with data residency and security — something the announcement addresses implicitly rather than in detail. Transparency is a similar story. Multi-agent systems making design decisions raise real questions about traceability and accountability when things go wrong, though Synopsys points to agent-level logging and human-in-the-loop checkpoints as its answer.

The longer-term question is what this does to semiconductor engineering itself. Synopsys and the WEF both frame agentic AI as a response to the industry’s talent shortage, offloading execution work so smaller teams can handle larger design portfolios. If the claimed gains hold up in production, that reshaping of the skill mix may end up being the most consequential part of this announcement — more than any single debug metric.

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